In small form-factor devices, ARM rules.
The ARM processor is a concept managed by a seemingly magical enemy (ARM Holdings, Ltd.) of the biggest processor companies on the planet. Its very existence is the crux of ancient (for the computer industry) arguments. Yet ARM Holdings has become powerful and plentiful enough to entice Microsoft to port Windows 8 to it, and to ARM most of Apple’s latest successes.
The ARM family of processors uses a concept known as Reduced Instruction Set Computing (RISC) methods, and the designs using this RISC methodology use much less power as a result. In a nutshell, RISC designs use fewer transistors, and therefore less power.
The phrase “much less power” is somewhat of a point of contention, usually foisted by the makers of CISC, or Complex Instruction Set Computers—who are the natural ideological competitors to RISC designers and providers. Nonetheless, ARM processors have been chosen for a wide variety of tasks, the most popular being those powering smartphones, and tablets. Apple uses them in the iPod Touch/iPhone family as well as in the iPad family.
Three years ago, when you walked down the aisles at a “big box” vendor’s computer aisles, most all of them were powered by derivates of Intel’s CISC designs. No more.
Apple like everyone else that uses ARM, either designed their own version, or picked from available designs, or had a design built for them. ARM Holdings produces a roadmap, and a compatibility standard, and isn’t a fabricator of chips like Intel and AMD. Indeed, Intel and AMD can make ARM chips if they strike a license deal with ARM (they have) and choose to make CPUs based on that deal. There are still a number of highly desirable places for CISC, just not in mobile devices.
The Theory
The ARM family of processors has a somewhat humble beginning as an extension of an 8-bit processor, the 6502 that powered the Apple II and the BBC Acorn computers. It’s the Acorn system design, and the desire to extend its life through the use of sparse designs, that led to the initial development efforts that spawned the ARM chip family known today.
RISC chips use fewer transistors, the basic logic gate of CPUs. CPUs must move data about quickly, and an argument for RISC technology is that the CPU doesn’t need a wide number of instructions available to it. More instructions means more transistors means more power and complexity.
Complex instructions can be made from two or more simple processor instructions performed sequentially. CISC instruction sets can be more sophisticated, and can also be used more readily and densely in multi-core (many CPUs on in a single casing) designs, currently. Most all of the transistors in a CPU, the heart of most computer systems, have to be fueled by tiny bits of electricity. More transistors equals more power consumed, although there are designs of transistors that use very little power, compared to the transistors in “mainstream” CPUs. RISC CPUs use fewer transistors, and therefore, less power.
CISC vendors argue that this is silly—and there’s not a lot of processing “tax” imposed by having complex instructions available when they’re needed. In a way, this is partially true. The ARM family’s RISC implementation, however, often consumes less power, which RISC adherents will say proves their point. They use less transistors, and ARM CPUs use processor instruction characteristics to perform work efficiently in the same amount of time.
More efficiency means better battery life and less overall power consumption. Unless you like to be tethered to chargers, less power consumption—especially in consumer devices—is highly desirable.
Indeed there’s truth to arguments made on both sides, yet ARM designs have been enormously successful in producing results on lower power consumed. That fact is important to mobile device makers which depend on battery life as a metric for success. Smartphones and tablets are often powered by ARM-based CPUs. Why doesn’t everyone use ARM for everything when power—even the source you plug into the wall outlet—is becoming more expensive? It’s not that easy. CISC chips hold the per-chip processing throne today, but at the cost of lots of power consumption.
The ARM Varietals
ARM chips are currently available as 8, 16, and 32-bit processors; many designs also have additional processing smarts onboard, or nearby. This means that the amount of math that that an ARM 32-bit processor can perform before the mantissa is too large and another register must be used (thereby increasing instruction execution time and a floating point processor proves handy) is more finite, compared to 64-bit CPUs. Indeed, 64-bit CPUs can perform outstanding math, and their “bitness” allows them to also address (fetch and write) huge amounts of memory in one fell swoop. Even 32-bit CISC CPUs can’t do that without losing time switching memory.
On a basic level, jumping from 32- to 64-bit ought to double the number of transistors needed, one might believe through simplistic math. The jump to 64-bits actually takes far more. Instead, what system architects did was take the basic ARM processor, then added subsystems that do work onboard the chip or nearby.
The nVidia Tegra designs, as an example, double the number of cores (as in ARM CPUs), and also add in video playback processing and low-power graphics processing units (GPUs) to make “superCPUs” that still sip, rather than gulp, power. Audio encoding is also included, so that audio/video (and obviously consumer-focused) rendering codecs can process multimedia onboard the chip. Doing so saves the power needed to power other chips to do the same thing in designs like tablets and smartphones. Camera and other popular peripheral controlling components all live in one tiny package, allowing a device to not only live a long life on batteries, but to be packaged in a small form factor as well.
Larger Still
HP's Project Moonshot proposes to use Calxeda ARM-based CPUs in comparatively extreme densities (said to be as many as 2,800 servers/processors per rack) in a configuration using perhaps only 10-15% of the power associated with the same computational power used today. By using the Calxeda “EnergyCore” processor, HP says that complexity is reduced, along with lower space, cooling, and overall asset cost.
More computational and processing power per cubic whatever is the goal and the huge benefit is vastly reduced power. It’s a big break away from current mainstream data center designs to use such density in data center configurations. Current configurations see a mix of machines having multi-core CISC machines, as many as 24 CPUs (cores) per chip. This design doesn’t quite yield 24x performance, and the power draw for such multi-core chips is comparatively huge. There is higher density computation per volume, but at the price of a single point of failure and with associated (but not quite 24x versus a discrete processor) power draw.
Power costs aren’t going down. As the cost of power has an effect on computing, more efficient designs will become highly desirable. This is one of ARM’s distinct advantages, along with the fact that the design characteristics are both more open and more competitive in terms of vendors that can produce them. The x86/x64 design has comparatively few manufacturers, especially in multi-core CPUs, because the fabs that built them are horridly expensive; not so with ARM fabrication.
There are things that ARM can’t do, and ARM won’t replace some of the CISC designs found in many kinds of high-performance personal computers and servers for a while. It has, however, caused a huge re-think about the nature of CPUs and power consumption, as well as fabrication and design of systems in cost-effective ways.
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